1. Field of the Invention
The present invention relates to a memory card in which a nonvolatile semiconductor memory is mounted.
2. Description of the Related Art
In a nonvolatile semiconductor memory mounted in a memory card, defects may occur in columns. If an error caused by a column defect is detected during a data read, the data is commonly recovered by an error checking and correction (ECC) process.
Further, during a data write, data may be forcedly written even in an area containing a defective column.
Jpn. Pat. Appln. KOKAI Publication No. 2003-178593 discloses a technique to provide a column repair circuit to repair a defective column.
However, when the ECC process is executed every time an error caused by a column defect occurs during a data read, not only loads concentrate in the ECC process but it also takes a long time to read data. This may undesirably degrade the performance of the whole memory.
On the other hand, when data is forcedly written in an area containing a defective column, an error rate may increase. Further, if the target memory is a NAND flash memory or the like, the number of loop processes based on a write verify function to verify the written data may reach its upper limit value. This may also degrade the performance of the whole memory.
Furthermore, if the column repair circuit disclosed in the above document is employed, a relatively long time is required for a column repair process for the defective column. This may also degrade the performance of the whole memory.
It is thus desired to present technique of preventing the degradation of performance of a process for a column defect.